hardware//I/O//serial bus//SPI

SPI (Serial Peripheral Interface) is a synchronous serial bus in which a controller clocks data in and out of one chip at a time over separate lines, and it is the link of choice for whatever is read fast on a board: inertial sensors, fast converters, flash memories, displays. Four wires carry it: the clock (SCLK), data from controller to chip (MOSI), data back (MISO) and a chip-select line (CS) that the controller pulls low to pick the device. Data flows both ways at once, one bit per clock edge, with no addresses and no acknowledgements, because the select line already says who is talking.

SPI (Serial Peripheral Interface) is a synchronous serial bus in which a controller clocks data in and out of one chip at a time over separate lines, and it is the link of choice for whatever is read fast on a board: inertial sensors, fast converters, flash memories, displays. Four wires carry it: the clock (SCLK), data from controller to chip (MOSI), data back (MISO) and a chip-select line (CS) that the controller pulls low to pick the device. Data flows both ways at once, one bit per clock edge, with no addresses and no acknowledgements, because the select line already says who is talking.

That simplicity buys speed. Clocks of 1 to 20 MHz or more are common, the lines are driven actively in both directions instead of being pulled up through a resistor, and a burst of a dozen bytes takes microseconds. This is why the IMU of a flight controller or a robot joint hangs on SPI and can be read at several kilohertz with time to spare for the control loop.

Each device needs its own select line, so pins grow with the number of chips. Boards with many fast sensors put several SPI buses side by side, or share one and accept that transfers queue behind each other.

No protocol catches errors. Nothing acknowledges that the chip was there, and a disconnected MISO line reads as all ones or all zeros, which a careless driver converts into a plausible number. Drivers read a fixed identity register at start-up and watch data-ready flags or sample counters; some sensors append a checksum.

Clock polarity and phase (the four SPI modes) must match between controller and chip. A wrong mode gives every bit shifted by one, a classic bring-up bug that looks like noise until someone checks the identity register.

Its reach is a board: at tens of megahertz the edges ring on long traces. Paired with DMA the transfer runs without the processor, and the sample is taken at a fixed instant instead of whenever the software gets round to it (jitter).