hardware//manufacturing//fab//deep reactive ion etching

Deep reactive ion etching (DRIE) cuts deep, straight-walled holes and trenches into silicon with a plasma, and it is how a fab turns a flat wafer into three-dimensional parts: the needles of neural probes, the moving combs of accelerometers, the vias that stack chips. Where photolithography decides where to cut, DRIE does the cutting, through tens or hundreds of micrometres instead of the fractions of a micrometre of ordinary etching.

Deep reactive ion etching (DRIE) cuts deep, straight-walled holes and trenches into silicon with a plasma, and it is how a fab turns a flat wafer into three-dimensional parts: the needles of neural probes, the moving combs of accelerometers, the vias that stack chips. Where photolithography decides where to cut, DRIE does the cutting, through tens or hundreds of micrometres instead of the fractions of a micrometre of ordinary etching.

The usual recipe is the Bosch process, which alternates two short steps many times. An etch step in a plasma of sulphur hexafluoride (SF6) removes silicon in every direction; a deposition step in octafluorocyclobutane (C4F8) coats every surface with a thin protective polymer. The ions of the next etch step strike mainly straight down, so they clear the polymer from the bottom of the trench but leave it on the walls, and the cut goes deeper without widening.

Etch a little, protect the walls, etch a little again.

Thousands of those cycles carve a shape tens of micrometres wide and a centimetre long with walls almost vertical, which no blade could do.

The walls keep a trace of the cycles. Each cycle leaves a shallow ripple, called scalloping, whose size follows how deep each etch step went; shorter cycles give smoother walls at the cost of speed.

It is a plasma, never a cutter. The material leaves as a gas formed from silicon and fluorine, so the part is never touched, which is what lets a shank 70 by 20 µm survive being made.

The neural probes of the Neuropixels family are carved this way out of their CMOS wafers, after the electronics and the electrodes are already built.