hardware//ARM//Cortex-M

2026-02-05

Cortex-M is ARM's microcontroller-profile core family, optimized for low power, low cost and deterministic real-time behavior. It is the heart of most modern MCU devices, and its targets are consumer products, start-ups and mass-market devices; in control it is the class of processor where the fast loop of a drone or a drive runs.

It executes Thumb-2 instructions, has a nested vectored interrupt controller (NVIC), and runs bare-metal or under an RTOS (real-time operating system). The NVIC serves an interrupt in a few tens of cycles with little variation, which is why a sensor read by interrupt on a Cortex-M has microseconds of latency where a loaded Linux has milliseconds.

Variants range from the Cortex-M0 (tiny, 12K gates) to the Cortex-M55, whose Helium vector extensions serve TinyML.

A Cortex-M7 at 480 MHz with a floating-point unit does hundreds of millions of operations per second; recent Pixhawk flight controllers carry one (STM32F7 or H7) running PX4 on NuttX (autopilot). That is enough for a 24-state EKF at a few hundred Hz in 32-bit floats, a cascade of PID loops at 1 kHz and a small int8 network in tens of microseconds.

CMSIS-DSP, ARM's signal-processing library for these cores, provides filters, FFTs and small float32 matrix routines (multiply, transpose, inverse, Cholesky). The Kalman filter lives there; an SVD of a large matrix does not, and neither does anything whose memory exceeds a few hundred kilobytes of RAM. Its numerical risk is precision: float32 carries about seven significant digits, so covariance updates are written in stable forms (floating-point arithmetic).

A typical MCU has one or two Cortex-M cores. Two equal cores are for multitasking (Wi-Fi and Bluetooth, or the application and its communications); two different cores are for efficiency, as when an M7 handles heavy data while an M4 watches timers, so that the M7 can sleep while the M4 monitors.